ST STM32G4 Series Reference Manual page 1956

FD controller area network (FDCAN)
Bits 31: 3 Reserved, must be kept at reset value.
Bits 2: 0 TRP: Transmission Request Pending.
Note: TXBRP bits set while a Tx scan is in progress are not considered during this particular Tx
scan. In case a cancellation is requested for such a Tx Buffer, this Add Request is canceled
immediately, the corresponding TXBRP bit is reset.
43.4.29 FDCAN Tx buffer add request register (FDCAN_TXBAR)
Address offset: 0x00CC
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
Res. Res. Res. Res.
Bits 31: 3 Reserved, must be kept at reset value.
Bits 2: 0 AR: Add Request
Note: If an add request is applied for a Tx Buffer with pending transmission request
(corresponding TXBRP bit already set), the request is ignored.
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Each Tx Buffer has its own Transmission Request Pending bit. The bits are set via register
TXBAR. The bits are reset after a requested transmission has completed or has been
canceled via register TXBCR.
After a TXBRP bit has been set, a Tx scan is started to check for the pending Tx request
with the highest priority (Tx Buffer with lowest Message ID).
A cancellation request resets the corresponding transmission request pending bit of
register TXBRP. In case a transmission has already been started when a cancellation is
requested, this is done at the end of the transmission, regardless whether the
transmission was successful or not. The cancellation request bits are reset directly after
the corresponding TXBRP bit has been reset.
After a cancellation has been requested, a finished cancellation is signaled via TXBCF
– after successful transmission together with the corresponding TXBTO bit
– when the transmission has not yet been started at the point of cancellation
– when the transmission has been aborted due to lost arbitration
– when an error occurred during frame transmission
In DAR mode all transmissions are automatically canceled if they are not successful. The
corresponding TXBCF bit is set for all unsuccessful transmissions.
0: No transmission request pending
1: Transmission request pending
28 27 26 25
Res. Res. Res.
12 11 10 9
Res. Res. Res.
Each Tx Buffer has its own Add Request bit. Writing a 1 will set the corresponding Add
Request bit; writing a 0 has no impact. This enables the Host to set transmission requests
for multiple Tx Buffers with one write to TXBAR. When no Tx scan is running, the bits are
reset immediately, else the bits remain set until the Tx scan process has completed.
0: No transmission request added
1: Transmission requested added.
24 23 22
Res. Res. Res.
8 7 6
Res. Res. Res.
RM0440 Rev 1
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
Res. Res. Res.
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RM0440
17 16
Res. Res.
1 0
AR[2:0]
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