Using Pseudo Random Pattern Mode - Intel Cyclone 10 GX User Manual

1. Perform the necessary steps from steps 1 to 7 in Steps to Perform Dynamic
Reconfiguration.
2. To disable the inverted PRBS pattern leaving the PRBS generator, perform a read-
modify-write to bit[2] with a value of 1'b1 to address 0x7.
3. To disable the inverted PRBS pattern entering the PRBS checker, perform a read-
modify-write to bit[4] with a value of 1'b1 to address 0xA.
4. Perform the necessary steps from steps 9 to 12 in Steps to Perform Dynamic
Reconfiguration.
Table 205. Register Map for PRBS Pattern Inversion
Reconfigurat Reconfigurat
ion Address ion Bit
(HEX)
0x007 [2]
0x00A [4]
Related Information
Steps to Perform Dynamic Reconfiguration

6.16.2. Using Pseudo Random Pattern Mode

You can use the Cyclone 10 GX Pseudo Random Pattern (PRP) generator and verifier in
the scrambler and descrambler to generate random data pattern and seed that the
scrambler can use. PRP mode is a test mode of the scrambler. Two seeds are available
to seed the scrambler: all 0s or two local fault-ordered sets. The seed is used in the
scrambler to produce the pattern. The
the scrambler will scramble. PRP is only available when the scrambler is enabled. The
PRP verifier shares the
read out from the corresponding registers.
6.16.2.1. Enabling Pseudo Random Pattern Mode
You must perform a sequence of read-modify-writes to the reconfiguration interface to
enable the Pseudo Random Pattern. The read-modify-writes are required to addresses
0x082, 0x097, and 0x0AC. To enable the Pseudo Random Pattern, complete the
following steps:
1. Perform the necessary steps from steps 1 to 7 in Steps to Perform Dynamic
Reconfiguration.
2. Perform a read-modify-write to address 0x082.
3. Perform a read-modify-write to address 0x097.
4. Perform a read-modify-write to address 0x0AC.
5. Perform the necessary steps from steps 9 to 12 in Steps to Perform Dynamic
Reconfiguration.
® ®
Intel Cyclone 10 GX Transceiver PHY User Guide
368
6. Reconfiguration Interface and Dynamic Reconfiguration
Attribute Name
tx_static_polarity_inversion
rx_static_polarity_inversion
rx_prbs_err
Bit Encoding
1'b1
1'b0
1'b1
1'b0
on page 328
r_tx_data_pat_sel
error signal with PRBS. The error count can be
UG-20070 | 2018.09.24
Description
Disables PRBS inversion
Enables PRBS inversion
(default)
Disables static polarity
inversion
Enables PRBS inversion
(default)
is the data pattern that
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