Ctle Settings - Intel Cyclone 10 GX User Manual

8. Analog Parameter Settings
UG-20070 | 2018.09.24

8.5.1. CTLE Settings

8.5.1.1. XCVR_C10_RX_ONE_STAGE_ENABLE
Pin planner or Assignment Editor Name
Receiver High Data Rate Mode Equalizer
Description
Selects between the CTLE high gain mode or CTLE high data rate mode for the
equalizer. If no assignment is made, S1_MODE is chosen by default.
Table 217. Available Options
Value in QSF
NON_S1_MODE
S1_MODE
Assign To
RX serial data pin.
Syntax
set_instance_assignment -name XCVR_C10_RX_ONE_STAGE_ENABLE
<value> -to <rx_serial_data pin name>
8.5.1.2. XCVR_C10_RX_EQ_DC_GAIN_TRIM
Pin planner or Assignment Editor Name
Receiver High Gain Mode Equalizer DC Gain Control
Description
Controls the DC gain of the continuous time linear equalizer (CTLE) in high gain mode.
A higher gain setting results in a larger DC gain.
For RX_LINK=SR, the default value is STG2_GAIN7.
For PCIe, default value is NO_DC_GAIN.
Table 218. Available Options
Value in TTK
DC Gain 0
DC Gain 1
DC Gain 2
DC Gain 3
DC Gain 4
Send Feedback
Value in Assignment
Editor
Off Selects high gain mode.
On Selects high data rate mode.
Value in Assignment Editor / qsf
NO_DC_GAIN
STG1_GAIN7
STG2_GAIN7
STG3_GAIN7
STG4_GAIN7
Description
Description
No DC gain
Equalizer DC gain setting 6
Equalizer DC gain setting 13
Equalizer DC gain setting 20
Equalizer DC gain setting 27
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Intel Cyclone 10 GX Transceiver PHY User Guide
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