Using Data Pattern Generators And Checkers; Using Prbs Data Pattern Generator And Checker - Intel Cyclone 10 GX User Manual

6. Reconfiguration Interface and Dynamic Reconfiguration
UG-20070 | 2018.09.24
Address
0x305[7:0]
0x306[7:0]
0x307[1:0]
0x30D[7:0]
0x30E[7:0]
0x30F[7:0]
0x310[7:0]
0x311[7:0]
0x312[7:0]
0x313[1:0]
Note: Intel recommends that you disable the byte serializer and deserializer blocks when
using the soft PRBS accumulators. When the byte serializer and deserializer blocks are
enabled, the number of bits counted are halved because the clock is running at half
the rate.
Related Information
• Steps to Perform Dynamic Reconfiguration
• Arbitration
•

Using Data Pattern Generators and Checkers

6.16. Using Data Pattern Generators and Checkers
The Cyclone 10 GX transceivers contain hardened data generators and checkers to
provide a simple and easy way to verify and characterize high speed links.
Hardening the data generators and verifiers saves FPGA fabric logic resources. The
pattern generator block supports the following patterns:
• Pseudo Random Binary Sequence (PRBS)
• Pseudo Random Pattern (PRP)
The pattern generators and checkers are supported only for non-bonded channels.

6.16.1. Using PRBS Data Pattern Generator and Checker

Use the Cyclone 10 GX PRBS generator and checker to simulate traffic and easily
characterize high-speed links without fully implementing any upper protocol stack
layer. The PRBS generator generates a self-aligning pattern and covers a known
number of unique sequences. Because the PRBS pattern is generated by a Linear
Feedback Shift Register (LFSR), the next pattern can be determined from the previous
Send Feedback
Type Name
RO Accumulated error count [39:32]
RO Accumulated error count [47:40]
RO Accumulated error count [49:48]
RO Accumulated bit pass through
count[7:0]
RO Accumulated bit pass through
count[15:8]
RO Accumulated bit pass through
count[23:16]
RO Accumulated bit pass through
count[31:24]
RO Accumulated bit pass through
count[39:32]
RO Accumulated bit pass through
count[47:40]
RO Accumulated bit pass through
count[49:48]
on page 325
Description
Accumulated error count [39:32]
Accumulated error count [47:40]
Accumulated error count [49:48]
Accumulated bit pass through count[7:0]
Accumulated bit pass through count[15:8]
Accumulated bit pass through count[23:16]
Accumulated bit pass through count[31:24]
Accumulated bit pass through count[39:32]
Accumulated bit pass through count[47:40]
Accumulated bit pass through count[49:48]
on page 328
on page 359
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Intel Cyclone 10 GX Transceiver PHY User Guide
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