Intel Cyclone 10 GX User Manual page 281

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5. Cyclone 10 GX Transceiver PHY Architecture
UG-20070 | 2018.09.24
the CDR sees valid data; therefore, you should hold receiver PCS logic in reset
(
rx_digitalreset
continuously asserted.
5.1.2.2.3. CDR Lock Modes
You can configure the CDR in either automatic lock mode or manual lock mode. By
default, the Quartus Prime software configures the CDR in automatic lock mode.
Automatic Lock Mode
In automatic lock mode, the CDR initially locks to the input reference clock (LTR
mode). After the CDR locks to the input reference clock, the CDR locks to the
incoming serial data (LTD mode) when the following conditions are met:
The signal threshold detection circuitry indicates the presence of valid signal levels
at the receiver input buffer when
The CDR output clock is within the configured ppm frequency threshold setting
with respect to the input reference clock (frequency locked).
The CDR output clock and the input reference clock are phase matched within
approximately 0.08 unit interval (UI) (phase locked).
If the CDR does not stay locked to data because of frequency drift or severe amplitude
attenuation, the CDR switches back to LTR mode.
Manual Lock Mode
The PPM detector and phase relationship detector reaction times can be too long for
some applications that require faster CDR lock time. You can manually control the CDR
to reduce its lock time using two optional input ports (
rx_set_locktodata
Table 165.
Relationship Between Optional Input Ports and the CDR Lock Mode
rx_set_locktoref
0
1
X
5.1.2.3. Deserializer
The deserializer block clocks in serial input data from the receiver buffer using the
high-speed serial recovered clock and deserializes the data using the low-speed
parallel recovered clock. The deserializer forwards the deserialized data to the receiver
PCS or FPGA fabric.
The deserializer supports the following deserialization factors: 8, 10, 16, 20, 32, 40,
and 64.
Send Feedback
) for a minimum of 4 µs after
rx_std_signaldetect
).
rx_set_locktodata
0
0
1
rx_is_lockedtodata
is enabled.
rx_set_locktoref
CDR Lock Mode
Automatic
Manual-RX CDR LTR
Manual-RX CDR LTD
®
®
Intel
Cyclone
10 GX Transceiver PHY User Guide
remains
and
281

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