Intel Cyclone 10 GX User Manual page 360

pattern. When the PRBS checker receives a portion of the received pattern, it can
generate the next sequence of bits to verify whether the next data sequence received
is correct.
The PRBS generator and checker are shared between the Standard and Enhanced
datapaths through the PCS. Therefore, they have only one set of control signals and
registers. The data lines from the various PCSs and shared PRBS generator are MUXed
before they are sent to the PMA. When the PRBS generator is enabled, the data on the
PRBS data lines is selected to be sent to the PMA. Either the data from the PCS or the
data generated from the PRBS generator can be sent to the PMA at any time.
The PRBS generator and checker can be configured for two widths of the PCS-PMA
interface: 10 bits and 64 bits. PRBS9 is available in both 10-bit and 64-bit PCS-PMA
widths. All other PRBS patterns are available in 64-bit PCS-PMA width only. The PRBS
generator and checker patterns can only be used when the PCS-PMA interface width is
configured to 10 bits or 64 bits. For any other PCS-PMA width, to ensure the correct
clocks are provided to the PRBS blocks you must first reconfigure the width to either
10 or 64 bits before using the PRBS generator and checker. For example, when the
transceiver is configured to a 20-bit PCS/PMA interface, you must first reconfigure the
PCS-PMA width to 10 bits before setting up the PRBS generator and checker. The PRBS
setup will not automatically change the PCS/PMA width.
The 10-bit PCS-PMA width for PRBS9 is available for lower frequency testing. You can
configure PRBS9 in either 10-bit or 64-bit width, based on the data rate. The FPGA
fabric-PCS interface must run in the recommended speed range of the FPGA core.
Therefore, you must configure PRBS9 in one of the two bit width modes, so that the
FPGA fabric-PCS interface parallel clock runs in this operating range.
Examples:
• If you want to use PRBS9 and the data rate is 2.5 Gbps, you can use the PRBS9 in
10-bit mode (PCS-PMA width = 10). In this case, the parallel clock frequency =
Data rate / PCS-PMA width = 2500 Mbps/10 = 250 MHz.
• If you want to use PRBS9 and the data rate is 6.4 Gbps, you can use the PRBS9 in
64-bit mode (PCS-PMA width = 64). In this case, the parallel clock frequency =
Data rate / PCS-PMA width = 6400 Mbps/64 = 100 MHz.
• If you want to use PRBS9 and the data rate is 12.5 Gbps, you can use the PRBS9
in 64 bit mode (PCS-PMA width = 64). In this case, the parallel clock frequency =
Data rate / PCS-PMA width = 12500 Mbps/64 = 195.3125 MHz.
Table 202. PRBS Supported Polynomials and Data Widths
Use the 10-bit mode of PRBS9 when the data rate is lower than 3 Gbps.
Pattern
PRBS7
PRBS9
PRBS15
PRBS23
PRBS31
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Intel Cyclone 10 GX Transceiver PHY User Guide
360
6. Reconfiguration Interface and Dynamic Reconfiguration
Polynomial
6 7
G(x) = 1+ x + x
5 9
G(x) = 1+ x + x
14 15
G(x) = 1+ x + x
18 23
G(x) = 1+ x + x
28 31
G(x) = 1+ x + x
UG-20070 | 2018.09.24
64-Bit 10-Bit
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X X
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