Standard Pcs Ports - Intel Cyclone 10 GX User Manual

Name Bit
[8]
[9]
[11:10]
[17:12]
[18]
[19]
Table 60. Bit Encodings for Basic Mode
In this case, the total word length is 67-bit with 64-bit data and 2-bit synchronous header.
Name Bit
[1:0]
rx_control
[2]

2.4.10. Standard PCS Ports

Figure 14. Transceiver Channel using the Standard PCS Ports
Standard PCS ports will appear, if either one of the transceiver configuration modes is selected that uses
Standard PCS or if Data Path Reconfiguration is selected even if the transceiver configuration is not one of
those that uses Standard PCS.
Optional Ports
tx_serial_clk0
(from TX PLL)
Serial Data
Optional Ports
CDR Control
Bit & Byte Reversal
Polarity Inversion
® ®
Intel Cyclone 10 GX Transceiver PHY User Guide
62
Functionality
Synchronous header error status
Block lock is achieved
Synchronous header
Unused
Synchronous header error status
Block lock is achieved
Functionality
Synchronous header
Inversion control
tx_cal_busy Nios Hard
rx_cal_busy Calibration IP
TX PMA
Serial Data
Clocks
Serializer
PCIe
Clock
Generation
Block
RX PMA
CDR
Clocks
PRBS
2. Implementing Protocols in Intel Cyclone 10 GX Transceivers
Active-high status signal that indicates a
synchronous header error.
Active-high status signal indicating when block
lock is achieved.
The value 2'b01 indicates a data word. The
value 2'b10 indicates a control word.
Active-high status signal that indicates a
synchronous header error.
Active-high status signal indicating when Block
Lock is achieved.
The value 2'b01 indicates a data word. The value
2'b10 indicates a control word.
A logic low indicates that built-in disparity
generator block in the Enhanced PCS maintains
the running disparity.
Cyclone 10 Transceiver Native PHY
Reconfiguration
Registers
TX Standard PCS
RX Standard PCS
Deserializer
UG-20070 | 2018.09.24
Description
Description
reconfig_reset
reconfig_clk
reconfig_avmm
Parallel Data, Control, Clocks
TX FIFO
8B/10B Encoder/Decoder
PCIe
tx_analog_reset
rx_analog_reset
Parallel Data, Control, Clocks
RX FIFO
Rate Match FIFO
Word Aligner & Bitslip
PCIe
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