Intel Cyclone 10 GX User Manual page 345

6. Reconfiguration Interface and Dynamic Reconfiguration
UG-20070 | 2018.09.24
Reverse Serial Loopback Mode (Post-CDR)
In the post-CDR mode, received data passes through the RX CDR and then loops back
to the TX output buffer. Perform read-modify-write to the following registers to enable
this mode.
Figure 216. Reverse Serial Loopback Mode (Post-CDR)
Table 189. Bit Values to Be Set
Note: No specific order to access these registers.
Disabling Reverse Serial Loopback Mode (Pre-CDR and Post-CDR)
To disable reverse-serial loopback mode, set the address bits to the following values,
by performing read-modify-write.
Table 190. Bit Values to Be Set
Note: No specific order to access these registers.
Related Information
Steps to Perform Dynamic Reconfiguration
Send Feedback
Transmitter
PCS
Receiver
PCS
Address
0x137[7]
0x13C[7]
0x132[5:4]
0x142[4]
0x11D[0]
Address
0x137[7]
0x13C[7]
0x132[5:4]
0x142[4]
0x11D[0]
PMA
Serializer
Post-CDR Reverse
Serial Loopback
PMA
Deserializer CDR
Bit Values
Bit Values
on page 328
® ®
Intel Cyclone
1'b0
1'b1
2'b01
1'b0
1'b0
1'b0
1'b0
2'b00
1'b0
1'b0
10 GX Transceiver PHY User Guide
345