Intel Cyclone 10 GX User Manual page 190

Complete the following steps to run an RTL functional simulation:
1. Open your Quartus Prime project.
2. On the Tools menu, select Run Simulation Tool, then select RTL Simulation or
Gate Level Simulation.
3. Run Quartus Prime Analysis and Elaboration and re-instantiate control signals that
you defined using the In-System Sources and Probe Editor. The In-System Sources
and Probe Editor can only access the pins of the device. Consequently, you must
route any signal that you want to observe to the top-level of your design.
4. To monitor additional signals, highlight the desired instances or nodes in
Instance, and right-click Add wave.
5. Select Simulate and then Run.
6. Specify the simulation duration.
7. Complete the following steps to restart the simulation:
a. On the Simulate menu, select restart, then click ok.
This action clears the existing waves.
b. Highlight run and select the appropriate options to run the simulation.
2.10.1.3. How to Use NativeLink to Specify Third-Party RTL Simulators
The following figure illustrates the high-level steps for using the NativeLink with Third-
Party EDA RTL simulator.
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Intel Cyclone 10 GX Transceiver PHY User Guide
190
2. Implementing Protocols in Intel Cyclone 10 GX Transceivers
UG-20070 | 2018.09.24
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