Native Phy Ip Parameter Settings For Cpri - Intel Cyclone 10 GX User Manual

2. Implementing Protocols in Intel Cyclone 10 GX Transceivers
UG-20070 | 2018.09.24
Figure 75. Connection Guidelines for a CPRI PHY Design
pll_refclk
8. Simulate your design to verify its functionality.

2.8.5. Native PHY IP Parameter Settings for CPRI

Table 135. General and Datapath Options
The first two sections of the Parameter Editor for the Native PHY IP provide a list of general and datapath
options to customize the transceiver.
Message level for rule violations
Transceiver configuration rules
PMA configuration rules
Transceiver mode
Number of data channels
Data rate
Enable datapath and interface reconfiguration
Enable simplified data interface
Send Feedback
pll_locked
PLL IP Core
pll_cal_busy
tx_serialclk0
rx_cdr_refclk
tx_clkout
Data
Generator
tx_parallel_data
rx_clkout
Data
Verifier rx_parallel_data
Parameter
clk
reset
Reset Controller
pll_sel
Cyclone 10 GX Transceiver Native PHY
® ®
Intel Cyclone
tx_ready
rx_ready
tx_serial_data
rx_serial_data
Value
error
warning
CPRI (Auto)
CPRI (Manual)
basic
TX/RX Duplex
1-12
1228.8 Mbps
2457.6 Mbps
3072 Mbps
4915.2 Mbps
6144 Mbps
Off
On
10 GX Transceiver PHY User Guide
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