Intel Cyclone 10 GX User Manual page 274

Figure 169. Transmitter Buffer
Programmable
Pre-Emphasis
and V
OD
R1* - Half of the actual on-chip termination selected.
5.1.1.2.1. High Speed Differential I/O
To improve performance, the Cyclone 10 GX transmitter uses a new architecture in the
output buffer—High Speed Differential I/O. You should select "High Speed Differential
I/O" for I/O standard of Cyclone 10 GX transmitter pin in Quartus Prime Assignment
Editor or QSF file.
5.1.1.2.2. Programmable Output Differential Voltage
You can program the differential output voltage (output swing) to handle different
channel losses and receiver requirements. There are 31 differential V
VCCT power supply level. The step size is 1/30 of the VCCT power supply level.
Figure 170. V (Differential) Signal Level
OD
Differential Waveform
V (Differential) = V
OD
Related Information
For more information, refer to Cyclone 10 GX Pre-Emphasis and Output Swing
Settings
® ®
Intel Cyclone 10 GX Transceiver PHY User Guide
274
R1*
Receiver
Detect
+V
P
V (Differential)
OD
- V
P N
5. Cyclone 10 GX Transceiver PHY Architecture
UG-20070 | 2018.09.24
On-Chip R1*
Termination
85Ω, 100Ω, OFF
TX
V
CM
–V
To Serial Data
Output Pins
(tx_serial_data)
settings up to
OD
0 V Differential
N
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