Intel Cyclone 10 GX User Manual page 97

2. Implementing Protocols in Intel Cyclone 10 GX Transceivers
UG-20070 | 2018.09.24
RX FIFO mode
Enable tx_std_pcfifo_full port
Enable tx_std_pcfifo_empty port
Enable rx_std_pcfifo_full port
Enable rx_std_pcfifo_empty port
TX byte serializer mode
RX byte deserializer mode
Enable TX 8B/10B encoder
Enable TX 8B/10B disparity control
Enable RX 8B/10B decoder
RX rate match FIFO mode
RX rate match insert / delete -ve pattern (hex)
RX rate match insert / delete +ve pattern (hex)
Enable rx_std_rmfifo_full port
Enable rx_std_rmfifo_empty port
Enable TX bit slip
Enable tx_std_bitslipboundarysel port
RX word aligner mode
RX word aligner pattern length
RX word aligner pattern (hex)
Number of word alignment patterns to achieve sync
Number of invalid data words to lose sync
Number of valid data words to decrement error count
Enable fast sync status reporting for deterministic latency SM
Enable rx_std_wa_patternalign port
Enable rx_std_wa_a1a2size port
Enable rx_std_bitslipboundarysel port
Enable rx_bitslip port
Enable TX bit reversal
Enable TX byte reversal
Send Feedback
Parameters Value
low latency (for GbE)
register_fifo (for GbE with IEEE 1588v2)
On/Off
On/Off
On/Off
On/Off
Disabled
Disabled
On
On/Off
On
gige (for GbE)
disabled (for GbE with IEEE 1588v2)
(/K28.5/D2.2/) (for GbE)
0x000ab683
(disabled for GbE with IEEE
0x00000000
1588v2)
(/K28.5/D16.2/) (for GbE)
0x000a257c
(disabled for GbE with IEEE
0x00000000
1588v2)
On/Off
(option disabled for GbE with IEEE 1588v2)
On/Off
(option disabled for GbE with IEEE 1588v2)
Off
On/Off
Synchronous state machine
7
(Comma) (for 7-bit
0x000000000000007c
aligner pattern length),
0x000000000000017c
(/K28.5/) (for 10-bit aligner pattern length)
3
3
3
On/Off
Off
Off
Off
Off
Off
Off
® ®
Intel Cyclone 10 GX Transceiver PHY User Guide
continued...
97