Intel Cyclone 10 GX User Manual page 253

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4. Resetting Transceiver Channels
UG-20070 | 2018.09.24
Figure 153. Dynamic Reconfiguration of Transmitter Channel During Device Operation
Device Power Up
tx_analogreset
pll_powerdown
tx_digitalreset
Note:
(1) The Cyclone 10 GX Default setting presets ttx_digitalreset to 70
(2) Area in gray is don't care zone.
RX Channel
The numbers in this list correspond to the numbers in the following figure.
1. Assert
low. You must reset the PCS by asserting
assert
2. Perform dynamic reconfiguration after minimum 70 μs of asserting
rx_analogreset
3. Deassert
4. The
rx_is_lockedtodata
5. Ensure
deasserting
Send Feedback
pll_cal_busy
tx_cal_busy
t
req
pll_locked
t
= 70 μs
1
req
and
rx_analogreset
.
rx_analogreset
.
rx_analogreset
rx_is_lockedtodata
rx_digitalreset
Legal
Reconfiguration
t
Window
req
2
3
μs.
. Ensure that
rx_digitalreset
rx_digitalreset
after performing dynamic reconfiguration.
signal goes high after the CDR acquires lock.
is asserted for t
(minimum of 4 μs) before
LTD
.
®
Intel
Cyclone
(1)
t
tx_digitalreset
4
5
rx_cal_busy
every time you
®
10 GX Transceiver PHY User Guide
is
253

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