Supported Features For Cpri - Intel Cyclone 10 GX User Manual

2. Implementing Protocols in Intel Cyclone 10 GX Transceivers
UG-20070 | 2018.09.24
Data Rate (Mbps)
3072.0
4915.2
6144.0

2.8.2. Supported Features for CPRI

The CPRI protocol places stringent requirements on the amount of latency variation
that is permissible through a link that implements these protocols.
CPRI (Auto) and CPRI (Manual) transceiver configuration rules are both available for
CPRI designs. Both modes use the same functional blocks, but the configuration mode
of the word aligner is different between the Auto and Manual modes. In CPRI (Auto)
mode, the word aligner works in deterministic mode. In CPRI (Manual) mode, the
word aligner works in manual mode.
To avoid transmission interference in time division multiplexed systems, every radio in
a cell network requires accurate delay estimates with minimal delay uncertainty. Lower
delay uncertainty is always desired for increased spectrum efficiency and bandwidth.
The Cyclone 10 GX devices are designed with features to minimize the delay
uncertainty for both RECs and REs.
2.8.2.1. Word Aligner in Deterministic Latency Mode for CPRI
The deterministic latency state machine in the word aligner reduces the known delay
variation from the word alignment process. It automatically synchronizes and aligns
the word boundary by slipping one half of a serial clock cycle (1UI) in the deserializer.
Incoming data to the word aligner is aligned to the boundary of the word alignment
pattern (K28.5).
Figure 71. Deterministic Latency State Machine in the Word Aligner
Parallel
Clock
From RX CDR
When using deterministic latency state machine mode, assert
rx_std_wa_patternalign
is complete. This is an edge-triggered signal in all cases except one: when the word
aligner is in manual mode and the PMA width is 10, in which case
rx_std_wa_patternalign
Send Feedback
Base Data Rate (Mbps)
6144.0
4915.2
6144.0
Clock-Slip
Control
Deserializer
to initiate the pattern alignment after the reset sequence
is level sensitive.
Local CGB Divider
Deterministic Latency
Synchronization State Machine
® ®
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