Intel Cyclone 10 GX Manuals

Manuals and User Guides for Intel Cyclone 10 GX. We have 2 Intel Cyclone 10 GX manuals available for free PDF download: User Manual

Intel Cyclone 10 GX User Manual

Intel Cyclone 10 GX User Manual (402 pages)

PHY

Brand: Intel | Category: Transceiver | Size: 5.03 MB

Table of Contents

Table of Contents
2
1 Intel ® Cyclone ® 10 GX Transceiver PHY Overview

7
2 Implementing Protocols in Intel Cyclone 10 GX Transceivers

16
3 Plls and Clock Networks

198
- Plls
  200
  - Transmit Plls Spacing Guidelines When Using ATX Plls and Fplls
    200
  - Atx Pll
    201
  - Fpll
    203
  - Cmu Pll
    206
- Input Reference Clock Sources
  208
- Transmitter Clock Network
  210
  - X1 Clock Lines
    211
  - X6 Clock Lines
    212
  - Xn Clock Lines
    214
- Clock Generation Block
  216
- FPGA Fabric-Transceiver Interface Clocking
  217
- Transmitter Data Path Interface Clocking
  219
- Receiver Data Path Interface Clocking
  220
- Unused/Idle Clock Line Requirements
  221
- Channel Bonding
  222
  - PMA Bonding
    222
  - PMA and PCS Bonding
    224
  - Selecting Channel Bonding Schemes
    225
  - Skew Calculations
    226
- PLL Feedback and Cascading Clock Network
  226
- Using Plls and Clock Networks
  231
  - Non-Bonded Configurations
    231
  - Bonded Configurations
    235
  - Implementing PLL Cascading
    240
  - Timing Closure Recommendations
    241
- Plls and Clock Networks Revision History
  241
4 Resetting Transceiver Channels

243
5 Cyclone 10 GX Transceiver PHY Architecture

272
- Cyclone 10 GX PMA Architecture
  272
  - Transmitter
    272
  - Receiver
    275
  - Loopback
    282
- Cyclone 10 GX Enhanced PCS Architecture
  283
  - Transmitter Datapath
    284
  - Receiver Datapath
    291
- Cyclone 10 GX Standard PCS Architecture
  299
  - Transmitter Datapath
    300
  - Receiver Datapath
    305
- Intel Cyclone 10 GX Transceiver PHY Architecture Revision History
  314
6 Reconfiguration Interface and Dynamic Reconfiguration

315
7 Calibration

373
- Reconfiguration Interface and Arbitration with Presice Calibration Engine
  373
- Calibration Registers
  375
  - Avalon-MM Interface Arbitration Registers
    375
  - Transceiver Channel Calibration Registers
    376
  - Fractional PLL Calibration Registers
    376
  - ATX PLL Calibration Registers
    377
  - Capability Registers
    377
  - Rate Switch Flag Register
    379
- Power-Up Calibration
  380
- User Recalibration
  383
  - Conditions that Require User Recalibration
    383
  - User Recalibration Sequence
    384
- Calibration Example
  385
  - ATX PLL Recalibration
    385
  - Fractional PLL Recalibration
    385
  - CDR/CMU PLL Recalibration
    386
  - PMA Recalibration
    386
- Calibration Revision History
  387
8 Analog Parameter Settings

388

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Intel Cyclone 10 GX User Manual

Intel Cyclone 10 GX User Manual (11 pages)

XCVR Toolkit Reference Design

Brand: Intel | Category: Microcontrollers | Size: 0.9 MB

Table of Contents

Table of Contents
2
Introduction
3
Requirement
3
Theory of Operation
3
How to Setup the Development Kits for XCVR Loopback Test
4
How to Reconstruct and Run the Reference Design
5
- Hardware Setup
  5
- XCVR Channel Loopback Test Run Procedure
  8
Conclusion
11
References
11
Revision History
11

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