Arbitration - Intel Cyclone 10 GX User Manual

6. Reconfiguration Interface and Dynamic Reconfiguration
UG-20070 | 2018.09.24

6.6. Arbitration

Figure 211. Cyclone 10 GX ATX PLL with Embedded Streamer
Reconfiguration
Figure 212. Cyclone 10 GX Native PHY with Embedded Streamer
Reconfiguration
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Cyclone 10 GX ATX PLL IP
User
Logic
Cyclone 10 GX Native PHY
User
Logic
Cyclone 10 GX ATX PLL
To/From
PreSICE
Reconfiguration
Interface
Streamer
ADME
Debug Fabric
Connectivity to channel reconfiguration registers
and optional soft registers
Host Link
Cyclone 10 GX Transceiver
To/From
PreSICE
Reconfiguration
Interface
Streamer
ADME
Debug Fabric
Connectivity to channel reconfiguration registers
and optional soft registers
Host Link
®
Intel Cyclone
Internal
Configuration
Bus
Configuration
Registers
Avalon-MM
Interface
Optional Reconfiguration Logic
(Capability, Control and Status)
Intel IP User Logic
Internal
Configuration
Channel
Bus
Configuration
Avalon-MM Registers
Interface
Optional Reconfiguration Logic
(Capability, Control and Status,
PRBS Soft Accumulators
Intel IP User Logic
®
10 GX Transceiver PHY User Guide
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