Figure 1-1 Cortex-M3 Block Diagram - ARM Cortex-M3 Technical Reference Manual

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Cortex-M3 hierarchy and implementation options

ARM DDI 0337B

The ETM and the MPU are optional components and might not exist in your

implementation.

The processor components exist in two levels of hierarchy, as shown in Figure 1-1. This

represents the RTL hierarchy of the design. Four components, ETM, TPIU,

SW/JTAG-DP, and ROM table, are shown outside the Cortex-M3 level because these

components are either optional, or there is flexibility in how they are implemented and

used. Your implementation might differ from that shown in Figure 1-1. The possible

implementation options are shown in the next three subsections.

Figure 1-1 Cortex-M3 block diagram

Introduction