ST STM32G4 Series Reference Manual page 2022

USB Type-C™ / USB Power Delivery interface (UCPD)
Transmit message sent interrupt
Transmit message discarded interrupt
Transmit interrupt status
When an interrupt from the UCPD is received, then the software has to check what is the
source of the interrupt by reading the UCPD_SR register.
Depending on which bit is at 1, the ISR should handle that condition and clear the bit by a
write to the appropriate bit in UCPD_ICR.
45.7 UCPD registers
45.7.1 UCPD configuration register 1 (UCPD_CFG1)
Address offset: 0x000
Reset value: 0x0000 0000
This register is used for IP configuration.
31 30 29
rw rw rw
15 14 13
TRANSWIN[4:0]
rw
2022/2083
Table 422. UCPD interrupt requests (continued)
Interrupt event
28 27 26 25
RXORDSETEN[8:0]
12 11 10 9
Event flag
TXMSGSENT
TXMSGDISC
Write data to be sent to
TXIS
24 23 22
rw
8 7 6
IFRGAP[4:0]
rw
RM0440 Rev 1
Event flag/Interrupt
clearing method
Write 1 to
TXMSGSENTCF
Write 1 to
TXMSGDISCCF
the UCPD_TXDR
register
21 20 19 18
PSC_USBPDCLK[2:0]
5 4 3
HBITCLKDIV[5:0]
rw
RM0440
Interrupt enable
control bit
TXMSGSENTIE
TXMSGDISCIE
TXISIE
17 16
Res.
rw
2 1 0