ST STM32G4 Series Reference Manual page 2028

USB Type-C™ / USB Power Delivery interface (UCPD)
31 30 29
Res. Res. Res. Res.
15 14 13
Res.
rw rw
Bits 31:21 Reserved
Bit 20 FRSEVTIE: Enable FRSEVT interrupt
This register can only be updated when UCPDEN=1.
Bits 19:16 Reserved
Bit 15 TYPECEVT2IE: Enable TYPECEVT2 interrupt
This register can only be updated when UCPDEN=1.
Bit 14 TYPECEVT1IE: Enable TYPECEVT1 interrupt
This register can only be updated when UCPDEN=1.
Bit 13 Reserved
Bit 12 RXMSGENDIE: Enable RXMSGEND interrupt
This register can only be updated when UCPDEN=1.
0: Disabled
1: Enabled
Bit 11 RXOVRIE: Enable RXOVR interrupt
This register can only be updated when UCPDEN=1.
0: Disabled
1: Enabled
Bit 10 RXHRSTDETIE: Enable RXHRSTDET interrupt
This register can only be updated when UCPDEN=1.
0: Disabled
1: Enabled
Bit 9 RXORDDETIE: Enable RXORDDET interrupt
This register can only be updated when UCPDEN=1.
0: Disabled
1: Enabled
Bit 8 RXNEIE: Enable RXNE interrupt
This register can only be updated when UCPDEN=1.
0: Disabled
1: Enabled
Bit 7 Reserved
2028/2083
28 27 26 25
Res. Res. Res.
12 11 10 9
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24 23 22
Res. Res. Res.
8 7 6
Res.
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RM0440 Rev 1
21 20 19 18
Res. Res. Res.
r
5 4 3 2
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RM0440
17 16
Res. Res.
1 0
rw rw