USB Type-C™ / USB Power Delivery interface (UCPD)
Table 420. Type-C sequence (source: 3A); cable/sink connected (Rd on CC1; Ra on CC2)
ANAMODE;
Type-C state
ANASUBMO
DE
Unattached.
SRC
0:Source;
11:Rp3A0
Attachwait.
SRC
0:Source;
11:Rp3A0
[SinkTxOK]
0:Source;
Attached.
10:Rp1A5
SRC
[SinkTxNG]
[VCONN =>
CC2]
0:Source;
11:Rp3A0
[SinkTxOK]
Unattached
wait.
SRC
Unattached.
0:Source;
11:Rp3A0
SRC
Normal case of USB PD transmit
On reception of a message from the Protocol Layer (i.e. to be sent),
Prepare Tx message contents by writing the following registers:
–
–
The message sending can be triggered by writing bit:
–
2018/2083
CCENABL
PHYCCSE
E
0 (don't
care)
11:both
enabled
01: CC2
disable
[Rd on
(possible
CC1]
and
recommend
ed due to
external
VCONN
switch)
11:both
0 (do not
enabled
care)
UCPD_TX_ORDSET
UCPD_TX_PAYSZ
TXSEND
CC[x]
RDCH
VCONN
L
EN
00:
[neither]
0:
[Norm
0
al]
10: [CC2
active]
1:
[discha
rge]
00:
[neither]
0:
[Norm
al]
RM0440 Rev 1
Event =>
go to
Comments
next line
PHYEVT
Wait for sink attach
1: [VRd-
detect ; seen on CC1
3A0]
[EVT1]
Attachwait started (100-
PHYEVT
200ms) ; now also see
2: [VRa]
the Ra => requesting
VCONN
Local CC2 disconnected
Timer
from PHY (VCONN
(100 ms)
switch connects VCONN
and no
source to CC2
PHYEVT
externally;
x
Continue to monitor
PHYEVT1
Source wants to initiate
message sequence
(SinkTxNG condition set
SW
first)
timers
(SinkTxN
Source finished
G)
message sequence
(SinkTxOK condition
afterwards)
PHYEVT
Wait for Sink
1:
disconnected (Vopen on
[VOpen-
CC1)
3A0]
Special Source
>0.8V
w/VCONN state (ECR
detection
Apr 2016):
(or
Discharge VCONN
timer?)
[CC2] actively [Rdch] ; to
< 0.8V
[Details as first line of
table]
RM0440
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