Address Registers (R0-R3); Stack Pointer Register (Sp); Offset Register (N) - Motorola DSP56800 Manual

Address Generation Unit
4.1.1

Address Registers (R0-R3)

The address register file consists of four 16-bit registers R0-R3 (Rn) that usually contain addresses used as
pointers to memory. Each register may be read or written by the CGDB. High speed access to the XAB1,
XAB2, and PAB buses is required to allow maximum access time for the internal and external X data
memory and program memory. Each address register may be used as input for the modulo arithmetic unit
for a register update calculation. Each register may be written by the output of the modulo arithmetic unit.
The R3 register may be used as input to a separate incrementer/decrementer unit for an independent
register update calculation. This unit is used in the case of any instruction that performs two data memory
reads in its parallel move field. For instructions where two reads are performed from the X data memory,
the second read using the R3 pointer must always access on-chip memory.
Due to pipelining, if an address register (Rn, SP, or M01) is changed with
a MOVE or bit-field instruction, the new contents will not be available for
use as a pointer until the second following instruction. If the SP is changed,
no LEA or POP instructions are permitted until the second following
instruction.
4.1.2

Stack Pointer Register (SP)

The stack pointer register (SP) is a single 16-bit register that is used implicitly in all PUSH instruction
macros and POP instructions. The SP is used explicitly for memory references when used with the
address-register-indirect modes. It is post-decremented on all POPs from the software stack. The SP
register may be read or written by the CGDB.
This register must be initialized explicitly by the programmer after coming
out of reset.
Due to pipelining, if an address register (Rn, SP, or M01) is changed with
a MOVE or bit-field instruction, the new contents will not be available for
use as a pointer until the second following instruction. If the SP is changed,
no LEA or POP instructions are permitted until the second following
instruction.
4.1.3

Offset Register (N)

The offset register (N) usually contains offset values used to update address pointers. This single register
can be used to update or index with any of the address registers (R0-R3, SP). This offset register may be
read or written by the CGDB. The offset register is used as input to the modulo arithmetic unit. It is often
used for array indexing or indexing into a table, as discussed in Section 8.7, "Array Indexes," on page
8-26.
4-4
NOTE:
NOTE:
DSP56800 Family Manual