Probe Mode Control Register; Table 11. Register Access Pir Values - Intel Quark SoC X1000 User Manual

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Table 11. Register Access PIR Values

Register 64 Bit PIR Value
CR0 0x000000001D660000
CR3 0x000000801D660000
EFLAGS 0x000000401D660000
EIP 0x000000C01D660000
EDI 0x000000201D660000
ESI 0x000000A01D660000
EBP 0x000000601D660000
ESP 0x000000E01D660000
EBX 0x000000101D660000
EDX 0x000000901D660000
ECX 0x000000501D660000
EAX 0x000000D01D660000
DR6 0x000000301D660000
DR7 0x000000B01D660000
TR 0x000000701D660000
LDTR 0x000000F01D660000
GS 0x000000081D660000
FS 0x000000881D660000
DS 0x000000481D660000
SS 0x000000C81D660000
CS 0x000000281D660000
ES 0x000000A81D660000
TSSar 0x000000681D660000
TSSbase 0x000000E81D660000
5.6.10

Probe Mode Control Register

This register contains only one bit: the IR bit. When this bit is set, all debug
exceptions (#DB) are converted to Probe Mode entry. This bit must be set for all types
of instruction steps and when hardware breakpoints are installed. If the core adds
support for software breakpoints, this bit would be set to enable them as well.
This register is accessible via the TAP and through the SRAM. The pseudo opcode PIR
value for this register in the SRAM is 0x000000421D660000.
Order Number: 329866-002US
Register 64 Bit PIR Value
TSSlimit 0x000000181D660000
IDTar 0x000000981D660000
IDTbase 0x000000581D660000
IDTlimit 0x000000D81D660000
GDTar 0x000000381D660000
GDTbase 0x000000B81D660000
GDTlimit 0x000000781D660000
LDTar 0x000000F81D660000
LDTbase 0x000000041D660000
LDTlimit 0x000000841D660000
GSar 0x000000441D660000
GSbase 0x000000C41D660000
GSlimit 0x000000241D660000
FSar 0x000000A41D660000
FSbase 0x000000641D660000
FSlimit 0x000000E41D660000
DSar 0x000000141D660000
DSbase 0x000000941D660000
DSlimit 0x000000541D660000
SSar 0x000000D41D660000
SSbase 0x000000341D660000
SSlimit 0x000000B41D660000
CSar 0x000000741D660000
CSbase 0x000000F41D660000
Register 64 Bit PIR Value
CSlimit 0x0000000C1D660000
ESar 0x0000008C1D660000
ESbase 0x0000004C1D660000
ESlimit 0x000000CC1D660000
CR4 0x0000002C1D660000
SIP 0x000000AC1D660000
TMPD 0x0000006C1D660000
TMPB 0x000000EC1D660000
TMPC 0x0000001C1D660000
HALT 0x0000009C1D660000
REV 0x0000005C1D660000
BASE 0x000000DC1D660000
PDR6 0x0000003C1D660000
CR2 0x000000BC1D660000
DR0 0x0000007C1D660000
DR1 0x000000FC1D660000
DR2 0x000000021D660000
DR3 0x000000821D660000
PMCR 0x000000421D660000
SRAMACCESS 0x0000000E9D660000
SRAM2PDR 0x4CF0000000000000
PDR2SRAM 0x0CF0000000000000
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