Irq Interrupt Commands; Table 29. Irq Bit Mapping And Definition - STMicroelectronics STM32WLEx Reference Manual

RM0461
bytes 3:2
bytes 5:4
bytes 7:6
Reset_Stats() command
Reset_Stats(0x00,0x00,0x00,0x00,0x00,0x00) resets the received packet
statistics as reported in Get_Stats() (NbPktReceived, NbPktCrcError, NbPktlengthError
and NbPktHeaderError).
0
Opcode
w
byte 0
byte 1
byte 2
byte 3
byte 4
byte 5
byte 6
4.8.6

IRQ interrupt commands

There are three IRQ interrupts that can be mapped to several sub-GHz radio interrupt
sources. The source of an interrupt is determined by reading the device status. Interrupts
are cleared using Clr_IrqStatus().
There are 10 possible interrupt sources used depending on the packet type and operating
mode. Each of these interrupt sources can be enabled or masked and mapped on any of the
IRQ interrupts.
A set of commands is used to configure and control the IRQ sources and interrupt
generation
Bit Source
0 TxDone
1 RxDone
2 PreambleDetected
3 SyncDetected
4 HeaderValid
5 HeaderErr
bits 15:0 NbPktReceived[15:0]: Number of packets received
bits 15:0 NbPktCrcError[15:0]: Number of packets received with a payload CRC error.
bits 15:0 NbPktHeaderError[15:0]: Number of packets received with a header CRC
error
1 2
0x00 0x00
w w
bits 7:0 Opcode: 0x0
bits 7:0 0x0
bits 7:0 0x0
bits 7:0 0x0
bits 7:0 0x0
bits 7:0 0x0
bits 7:0 0x0

Table 29. IRQ bit mapping and definition

Description
Packet transmission finished
Packet reception finished
Preamble detected
Synchronization word valid
Header valid
Header CRC error
RM0461 Rev 5
Sub-GHz radio (SUBGHZ)
3 4
0x00 0x00
w w
Packet type
LoRa and GFSK
LoRa and GFSK
LoRa and GFSK
GFSK
LoRa
LoRa
5 6
0x00 0x00
w w
Operation
Tx
Rx
Rx
Rx
Rx
Rx
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