Reset and clock control for (RCC)
6.3.32
RCC register map
Table 26
Table 26.
RCC register map and reset values for STM32F405xx/07xx and STM32F415xx/17xx
Addr.
Register
offset
name
0x00
RCC_CR
Reserved
RCC_PLLCF
0x04
Reserved
GR
0x08
RCC_CFGR
0x0C
RCC_CIR
RCC_AHB1R
0x10
STR
RCC_AHB2R
0x14
STR
RCC_AHB3R
0x18
STR
0x1C
Reserved
RCC_APB1R
0x20
STR
RCC_APB2R
0x24
STR
0x28
Reserved
0x2C
Reserved
RCC_AHB1E
0x30
NR
RCC_AHB2E
0x34
NR
RCC_AHB3E
0x38
NR
0x3C
Reserved
181/1422
gives the register map and reset values.
Reserved
Reserved
Reserved
Doc ID 018909 Rev 4
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
RM0090
Need help?
Do you have a question about the STM32F40 Series and is the answer not in the manual?
Questions and answers