Table 62. Positioning Of Captured Data Bytes In 32-Bit Words (8-Bit Width); Table 63. Positioning Of Captured Data Bytes In 32-Bit Words (10-Bit Width); Table 64. Positioning Of Captured Data Bytes In 32-Bit Words (12-Bit Width) - ST STM32F40 Series Reference Manual

Digital camera interface (DCMI)
8-bit data
When EDM[1:0] in DCMI_CR are programmed to "00" the interface captures 8 LSB's at its
input (D[0:7]) and stores them as 8-bit data. The D[13:8] inputs are ignored. In this case, to
capture a 32-bit word, the camera interface takes four pixel clock cycles.
The first captured data byte is placed in the LSB position in the 32-bit word and the 4
captured data byte is placed in the MSB position in the 32-bit word.
example of the positioning of captured data bytes in two 32-bit words.
Table 62.
Byte address
0
4
10-bit data
When EDM[1:0] in DCMI_CR are programmed to "01", the camera interface captures 10-bit
data at its input D[0..9] and stores them as the 10 least significant bits of a 16-bit word. The
remaining most significant bits in the DCMI_DR register (bits 11 to 15) are cleared to zero.
So, in this case, a 32-bit data word is made up every two pixel clock cycles.
The first captured data are placed in the LSB position in the 32-bit word and the 2
captured data are placed in the MSB position in the 32-bit word as shown in
Table 63.
Byte address
0
4
12-bit data
When EDM[1:0] in DCMI_CR are programmed to "10", the camera interface captures the
12-bit data at its input D[0..11] and stores them as the 12 least significant bits of a 16-bit
word. The remaining most significant bits are cleared to zero. So, in this case a 32-bit data
word is made up every two pixel clock cycles.
The first captured data are placed in the LSB position in the 32-bit word and the 2
captured data are placed in the MSB position in the 32-bit word as shown in
Table 64.
Byte address
0
4
14-bit data
When EDM[1:0] in DCMI_CR are programmed to "11", the camera interface captures the
14-bit data at its input D[0..13] and stores them as the 14 least significant bits of a 16-bit
333/1422
Positioning of captured data bytes in 32-bit words (8-bit width)
31:24
D [7:0]
n+3
D [7:0]
n+7
Positioning of captured data bytes in 32-bit words (10-bit width)
31:26
0
0
Positioning of captured data bytes in 32-bit words (12-bit width)
31:28
0
0
Doc ID 018909 Rev 4
23:16
D [7:0] D
n+2
D [7:0] D
n+6
25:16
D [9:0]
n+1
D [9:0]
n+3
27:16
D [11:0]
n+1
D [11:0]
n+3
Table 62 gives an
15:8 7:0
[7:0] D [7:0]
n+1 n
[7:0] D
n+5 n+4
nd
Table
15:10 9:0
0 D [9:0]
n
0 D
n+2
nd
Table
15:12 11:0
0 D [11:0]
n
0 D [11:0]
n+2
RM0090
th
[7:0]
63.
[9:0]
64.