Sdio Mask Register (Sdio_Mask) - ST STM32F40 Series Reference Manual

RM0090
28.9.13

SDIO mask register (SDIO_MASK)

Address offset: 0x3C
Reset value: 0x0000 0000
The interrupt mask register determines which status flags generate an interrupt request by
setting the corresponding bit to 1b.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Reserved
Bits 31:24 Reserved, must be kept at reset value
Bit 23 CEATAENDIE: CE-ATA command completion signal received interrupt enable
Bit 22 SDIOITIE: SDIO mode interrupt received interrupt enable
Bit 21 RXDAVLIE: Data available in Rx FIFO interrupt enable
Bit 20 TXDAVLIE: Data available in Tx FIFO interrupt enable
Bit 19 RXFIFOEIE: Rx FIFO empty interrupt enable
Bit 18 TXFIFOEIE: Tx FIFO empty interrupt enable
Bit 17 RXFIFOFIE: Rx FIFO full interrupt enable
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Set and cleared by software to enable/disable the interrupt generated when receiving the
CE-ATA command completion signal.
0: CE-ATA command completion signal received interrupt disabled
1: CE-ATA command completion signal received interrupt enabled
Set and cleared by software to enable/disable the interrupt generated when receiving the
SDIO mode interrupt.
0: SDIO Mode Interrupt Received interrupt disabled
1: SDIO Mode Interrupt Received interrupt enabled
Set and cleared by software to enable/disable the interrupt generated by the presence of
data available in Rx FIFO.
0: Data available in Rx FIFO interrupt disabled
1: Data available in Rx FIFO interrupt enabled
Set and cleared by software to enable/disable the interrupt generated by the presence of
data available in Tx FIFO.
0: Data available in Tx FIFO interrupt disabled
1: Data available in Tx FIFO interrupt enabled
Set and cleared by software to enable/disable interrupt caused by Rx FIFO empty.
0: Rx FIFO empty interrupt disabled
1: Rx FIFO empty interrupt enabled
Set and cleared by software to enable/disable interrupt caused by Tx FIFO empty.
0: Tx FIFO empty interrupt disabled
1: Tx FIFO empty interrupt enabled
Set and cleared by software to enable/disable interrupt caused by Rx FIFO full.
0: Rx FIFO full interrupt disabled
1: Rx FIFO full interrupt enabled
Doc ID 018909 Rev 4
Secure digital input/output interface (SDIO)
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