ST STM32F40 Series Reference Manual page 159

Hide thumbs Also See for STM32F40 Series:
Hello, I am your AI assistant. How can I help you?
Table of Contents

Advertisement

Reset and clock control for (RCC)
Bit 21 DMA1LPEN: DMA1 clock enable during Sleep mode
Set and cleared by software.
0: DMA1 clock disabled during Sleep mode
1: DMA1 clock enabled during Sleep mode
Bits 20:19 Reserved, must be kept at reset value.
Bit 18 BKPSRAMLPEN: Backup SRAM interface clock enable during Sleep mode
Set and cleared by software.
0: Backup SRAM interface clock disabled during Sleep mode
1: Backup SRAM interface clock enabled during Sleep mode
Bit 17 SRAM2LPEN: SRAM 2 interface clock enable during Sleep mode
Set and cleared by software.
0: SRAM 2 interface clock disabled during Sleep mode
1: SRAM 2 interface clock enabled during Sleep mode
Bit 16 SRAM1LPEN: SRAM 1interface clock enable during Sleep mode
Set and cleared by software.
0: SRAM 1 interface clock disabled during Sleep mode
1: SRAM 1 interface clock enabled during Sleep mode
Bit 15 FLITFLPEN: Flash interface clock enable during Sleep mode
Set and cleared by software.
0: Flash interface clock disabled during Sleep mode
1: Flash interface clock enabled during Sleep mode
Bits 14:13 Reserved, must be kept at reset value.
Bit 12 CRCLPEN: CRC clock enable during Sleep mode
Set and cleared by software.
0: CRC clock disabled during Sleep mode
1: CRC clock enabled during Sleep mode
Bits 11:9 Reserved, must be kept at reset value.
Bit 8 GPIOILPEN: IO port I clock enable during Sleep mode
Set and cleared by software.
0: IO port I clock disabled during Sleep mode
1: IO port I clock enabled during Sleep mode
Bit 7
GPIOHLPEN: IO port H clock enable during Sleep mode
Set and cleared by software.
0: IO port H clock disabled during Sleep mode
1: IO port H clock enabled during Sleep mode
Bits 6 GPIOGLPEN: IO port G clock enable during Sleep mode
Set and cleared by software.
0: IO port G clock disabled during Sleep mode
1: IO port G clock enabled during Sleep mode
Bit 5 GPIOFLPEN: IO port F clock enable during Sleep mode
Set and cleared by software.
0: IO port F clock disabled during Sleep mode
1: IO port F clock enabled during Sleep mode
159/1422
Doc ID 018909 Rev 4
RM0090

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32F40 Series and is the answer not in the manual?

Questions and answers

This manual is also suitable for:

Stm32f41 seriesStm32f42 seriesStm32f43 seriesRm0090

Table of Contents

Save PDF