(X = A; Gpio Register Map; Table 32. Gpio Register Map And Reset Values - ST STM32F40 Series Reference Manual

Hide thumbs Also See for STM32F40 Series:
Table of Contents

Advertisement

General-purpose I/Os (GPIO)
Bits 31:0 AFRLy: Alternate function selection for port x bit y (y = 0..7)
7.4.10
GPIO alternate function high register (GPIOx_AFRH)
(x = A..I)
Address offset: 0x24
Reset value: 0x0000 0000
31
30
29
AFRH15[3:0]
rw
rw
rw
15
14
13
AFRH11[3:0]
rw
rw
rw
Bits 31:0 AFRHy: Alternate function selection for port x bit y (y = 8..15)
These bits are written by software to configure alternate function I/Os
AFRHy selection:
0000: AF0
0001: AF1
0010: AF2
0011: AF3
0100: AF4
0101: AF5
0110: AF6
0111: AF7
7.4.11

GPIO register map

The following table gives the GPIO register map and the reset values.
Table 32.
GPIO register map and reset values
Offset
Register
GPIOA_MODER
0x00
Reset value
1
203/1422
These bits are written by software to configure alternate function I/Os
AFRLy selection:
0000: AF0
0001: AF1
0010: AF2
0011: AF3
0100: AF4
0101: AF5
0110: AF6
0111: AF7
28
27
26
25
AFRH14[3:0]
rw
rw
rw
rw
12
11
10
9
AFRH10[3:0]
rw
rw
rw
rw
0
1
0
1
0
0
0
0
Doc ID 018909 Rev 4
1000: AF8
1001: AF9
1010: AF10
1011: AF11
1100: AF12
1101: AF13
1110: AF14
1111: AF15
24
23
22
AFRH13[3:0]
rw
rw
rw
8
7
6
AFRH9[3:0]
rw
rw
rw
1000: AF8
1001: AF9
1010: AF10
1011: AF11
1100: AF12
1101: AF13
1110: AF14
1111: AF15
0
0
0
0
0
0
0
0
0
21
20
19
18
AFRH12[3:0]
rw
rw
rw
rw
5
4
3
2
AFRH8[3:0]
rw
rw
rw
rw
0
0
0
0
0
0
0
0
RM0090
17
16
rw
rw
1
0
rw
rw
0
0
0
0
0
0

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32F40 Series and is the answer not in the manual?

Questions and answers

This manual is also suitable for:

Stm32f41 seriesStm32f42 seriesStm32f43 seriesRm0090

Table of Contents

Save PDF