RM0090
Table 112. Error calculation for programmed baud rates at f
oversampling by 16
Baud rate
S.No
Desired
9.
921.6 KBps
NA
10.
1.792 MBps
NA
11.
1.8432 MBps NA
12.
3.584 MBps
NA
13.
3.6864 MBps NA
14.
7.168 MBps
NA
15.
7.3728 MBps NA
1. The lower the CPU clock the lower the accuracy for a particular baud rate. The upper limit of the achievable baud rate can
be fixed with these data.
Table 113. Error calculation for programmed baud rates at f
oversampling by 8
Baud rate
S.No
Desired
1.
2.4 KBps
2.400 KBps
2.
9.6 KBps
9.604 KBps
3.
19.2 KBps
19.185 KBps
4.
57.6 KBps
57.557 KBps
5.
115.2 KBps
115.942 KBps 8.625
6.
230.4 KBps
228.571 KBps 4.375
7.
460.8 KBps
470.588 KBps 2.125
8.
896 KBps
888.889 KBps 1.125
9.
921.6 KBps
888.889 KBps 1.125
10.
1.792 MBps
NA
11.
1.8432 MBps NA
12.
3.584 MBps
NA
13.
3.6864 MBps NA
14.
7.168 MBps
NA
15.
7.3728 MBps NA
Universal synchronous asynchronous receiver transmitter (USART)
(1)
(continued)
Oversampling by 16 (OVER8=0)
f
= 8 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
NA
NA
NA
NA
NA
NA
NA
(1)
Oversampling by 8 (OVER8=1)
f
= 8 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
416.625
104.125
52.125
17.375
NA
NA
NA
NA
NA
NA
Doc ID 018909 Rev 4
PCLK
% Error =
(Calculated -
Desired)B.Rate
/Desired B.Rate
NA
941.176 KBps
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
PCLK
% Error =
(Calculated -
Desired)B.Rate
/Desired B.Rate
0.01%
2.400 KBps
0.04%
9.598 KBps
0.08%
19.208 KBps
0.08%
57.554 KBps
0.64%
115.108 KBps 17.375
0.79%
231.884 KBps 8.625
2.12%
457.143 KBps 4.375
0.79%
888.889 KBps 2.250
3.55%
941.176 KBps 2.125
NA
1.7777 MBps
NA
1.7777 MBps
NA
NA
NA
NA
NA
NA
NA
NA
= 8 MHz or f
= 16 MHz,
PCLK
f
= 16 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
1.0625
NA
NA
NA
NA
NA
NA
= 8 MHz or f
= 16 MHz,
PCLK
f
= 16 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
833.375
208.375
104.125
34.750
1.125
1.125
NA
NA
NA
NA
% Error
2.12%
NA
NA
NA
NA
NA
NA
% Error
0.00%
0.02%
0.04%
0.08%
0.08%
0.64%
0.79%
0.79%
2.12%
0.79%
3.55%
NA
NA
NA
NA
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