Voltage Regulator; Figure 8. Backup Domain - ST STM32F40 Series Reference Manual

RM0090
When the backup domain is supplied by V
SRAM is powered from V
When the backup domain is supplied by V
V is not present), the backup SRAM is powered by a dedicated low power regulator. This
DD
regulator can be ON or OFF depending whether the application needs the backup SRAM
function in Standby and V
by a dedicated bit, the BRE control bit of the PWR_CSR register (see
power control/status register
The backup SRAM is not mass erased by an tamper event. It is read protected to prevent
confidential data, such as cryptographic private key, from being accessed. The backup
SRAM can be erased only through the Flash interface when a protection level change from
level 1 to level 0 is requested. Refer to the description of Read protection (RDP) in the Flash
programming manual.
Figure 8.
5.1.3

Voltage regulator

An embedded linear voltage regulator supplies all the digital circuitries except for the backup
domain and the Standby circuitry. The regulator output voltage is around 1.2 V.
This voltage regulator requires two external capacitors to be connected to two dedicated
pins, V
CAP_1
V or V
SS
package.
which replaces the V
DD
modes or not. The power-down of this regulator is controlled
BAT
(PWR_CSR)).
Backup domain
Voltage regulator
3.3 -> 1.2 V
1.2 V domain
Backup SRAM
interface
and V available in all packages. Specific pins must be connected either to
CAP_2
to activate or deactivate the voltage regulator. These pins depend on the
DD
Doc ID 018909 Rev 4
(analog switch connected to V
DD
power supply to save battery life.
BAT
(analog switch connected to V
BAT
Power switch LP voltage regulator
3.3 -> 1.2 V
Backup SRAM
1.2 V
RTC LSE 32.768 Hz
Backup domain
Power controller (PWR)
), the backup
DD
because
BAT
Section 5.4.3: PWR
MS30430V1
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