ST STM32F40 Series Reference Manual page 76

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RM0090
Bit 8 PRFTEN: Prefetch enable
Bits 7:3 Reserved, must be kept cleared.
Bits 2:0 LATENCY: Latency
0: Prefetch is disabled
1: Prefetch is enabled
These bits represent the ratio of the CPU clock period to the Flash memory access time.
000: Zero wait state
001: One wait state
010: Two wait states
011: Three wait states
100: Four wait states
101: Five wait states
110: Six wait states
111: Seven wait states
Doc ID 018909 Rev 4
Embedded Flash memory interface
76/1422

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