Clock Generator; Figure 304. Pcm Standard Waveforms (16-Bit); Figure 305. Pcm Standard Waveforms (16-Bit Extended To 32-Bit Packet Frame) - ST STM32F40 Series Reference Manual

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For long frame synchronization, the WS signal assertion time is fixed 13 bits in master

For short frame synchronization, the WS synchronization signal is only one cycle long.

For both modes (master and slave) and for both synchronizations (short and long), the

number of bits between two consecutive pieces of data (and so two synchronization signals)

needs to be specified (DATLEN and CHLEN bits in the SPI_I2SCFGR register) even in slave

Clock generator

S bitrate determines the dataflow on the I

S bitrate = number of bits per channel × number of channels × sampling audio frequency

For a 16-bit audio, left and right channel, the I

S bitrate = 16 × 2 × F

fixed to 13-bit

Doc ID 018909 Rev 4

fixed to 13-bit

S data line and the I

S bitrate is calculated as follows:

Serial peripheral interface (SPI)

S clock signal

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