Dcmi Data Register (Dcmi_Dr); Dcmi Register Map; Table 70. Dcmi Register Map And Reset Values - ST STM32F40 Series Reference Manual

Digital camera interface (DCMI)
13.8.11

DCMI data register (DCMI_DR)

Address offset: 0x28
Reset value: 0x0000 0x0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Byte3
r r r r r r r
Bits 31:24 Data byte 3
Bit 23:16 Data byte 2
The digital camera Interface packages all the received data in 32-bit format before
requesting a DMA transfer. A 4-word deep FIFO is available to leave enough time for DMA
transfers and avoid DMA overrun conditions.
13.8.12

DCMI register map

Table 70
Table 70. DCMI register map and reset values
Offset Register
DCMI_CR
0x00
Reset value
DCMI_SR
0x04
Reset value
DCMI_RIS
0x08
Reset value
DCMI_IER
0x0C
Reset value
DCMI_MIS
0x10
Reset value
DCMI_ICR
0x14
Reset value
351/1422
Byte2
r r r r r r
Bits 15:8 Data byte 1
Bit 7:0 Data byte 0
summarizes the DCMI registers.
Reserved
Doc ID 018909 Rev 4
Byte1
r r r r r r r
Reserved
Reserved
Reserved
Reserved
Reserved
9 8 7 6 5
r r r r r r r
EDM FCRC
0 0 0 0 0 0 0
RM0090
4 3 2 1 0
Byte0
r r r r r
0 0 0 0 0 0
0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0