Can Filter Registers - ST STM32F40 Series Reference Manual

Controller area network (bxCAN)
Bits 15:8 DATA5[7:0]
Data byte 1 of the message.
Bits 7:0 DATA4[7:0]
Data byte 0 of the message.
24.9.4

CAN filter registers

CAN filter master register (CAN_FMR)
Address offset: 0x200
Reset value: 0x2A1C 0E01
All bits of this register are set and cleared by software.
31 30 29
15 14 13
Reserved
rw
Bits 31:14 Reserved, must be kept at reset value.
Bits 13:8 CAN2SB[5:0]
These bits are set and cleared by software. They define the start bank for the CAN2
interface (Slave) in the range 0 to 27.
Note: When CAN2SB[5:0] = 28d, all the filters to CAN1 can be used.
Bits 7:1 Reserved, must be kept at reset value.
Bit 0 FINIT
701/1422
:
Data Byte 5
:
Data Byte 4
28 27 26 25
12 11 10 9
CAN2SB[5:0]
rw rw rw rw
:
CAN2 start bank
When CAN2SB[5:0] is set to 0, no filters are assigned to CAN1.
:
Filter init mode
Initialization mode for filter banks
0: Active filters mode.
1: Initialization mode for the filters.
Doc ID 018909 Rev 4
24 23 22 21
Reserved
8 7 6 5
rw
20 19 18
4 3 2
Reserved
RM0090
17 16
1 0
FINIT
rw