Rcc Register Map; Table 14. Rcc - Register Map And Reset Values - ST STM32F102 Series Reference Manual

Reset and clock control (RCC)
6.3.11

RCC register map

The following table gives the RCC register map and the reset values.
Table 14. RCC - register map and reset values
Offset Register
RCC_CR
0x000
Reset value
RCC_CFGR
0x004
Reset value
RCC_CIR
0x008
Reset value
RCC_APB2RSTR
0x00C
Reset value
RCC_APB1RSTR Reser
0x010
Reset value
RCC_AHBENR
0x014
Reset value
0x018 RCC_APB2ENR
Reset value
RCC_APB1ENR Reser
0x01C
Reset value
RCC_BDCR
0x020
Reset value
RCC_CSR
0x024
Reset value 0
Refer to
96/690
Reserved
0 0
MCO [2:0]
Reserved
0 0 0
Reserved
0
Reserved
ved
0 0 0 0 0
Reserved
ved
0 0 0 0 0
Reserved
0 0 0 1 1 0
Table 1 on page 36 for the register boundary addresses.
Reserved
0 0 0 0 0
ADC
PLLMUL[3:0] PRE
[1:0]
0 0 0 0 0 0 0 0
0 0 0 0 0
0
0 0 0 0 0 0 0
Reserved
0
0 0 0 0 0 0 0
0 0
HSICAL[7:0] HSITRIM[4:0]
0 0 0 0 0 0 0 1 0
PPRE2 PPRE1
HPRE[3:0]
[2:0] [2:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
Reserved
0 0
0 0 0
0 0 0 0 0 0 0 0 0
Reserved
0 0
RTC
SEL
Reserved Reserved
[1:0]
0 0
Reserved
RM0008
0 0 0 1 1
SWS SW
[1:0] [1:0]
0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0 0
1 1 0 0
0 0 0 0 0
0 0 0 0 0 0
0 0 0
0 0