Usart Interrupts; Table 121. Usart Interrupt Requests; Figure 270. Usart Interrupt Mapping Diagram - ST STM32F40 Series Reference Manual

Hide thumbs Also See for STM32F40 Series:
Table of Contents

Advertisement

Universal synchronous asynchronous receiver transmitter (USART)
26.4

USART interrupts

Table 121. USART interrupt requests

Transmit Data Register Empty
CTS flag
Transmission Complete
Received Data Ready to be Read
Overrun Error Detected
Idle Line Detected
Parity Error
Break Flag
Noise Flag, Overrun error and Framing Error in multibuffer
communication
The USART interrupt events are connected to the same interrupt vector (see
During transmission: Transmission Complete, Clear to Send or Transmit Data Register
empty interrupt.
While receiving: Idle Line detection, Overrun error, Receive Data register not empty,
Parity error, LIN break detection, Noise Flag (only in multi buffer communication) and
Framing Error (only in multi buffer communication).
These events generate an interrupt if the corresponding Enable Control Bit is set.

Figure 270. USART interrupt mapping diagram

781/1422
Interrupt event
TC
TCIE
TXE
TXEIE
CTS
CTSIE
IDLE
IDLEIE
RXNEIE
ORE
RXNEIE
RXNE
PE
PEIE
LBD
LBDIE
FE
NE
EIE
ORE
DMAR
Doc ID 018909 Rev 4
Enable control
Event flag
TXE
TXEIE
CTS
CTSIE
TC
TCIE
RXNE
RXNEIE
ORE
IDLE
IDLEIE
PE
PEIE
LBD
LBDIE
NF or ORE or FE EIE
Figure
RM0090
bit
270).
USART
interrupt

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32F40 Series and is the answer not in the manual?

Questions and answers

This manual is also suitable for:

Stm32f41 seriesStm32f42 seriesStm32f43 seriesRm0090

Table of Contents

Save PDF