Slowing Down System Clocks; Peripheral Clock Gating; Table 18. Low-Power Mode Summary - ST STM32F40 Series Reference Manual

Power controller (PWR)
Table 18. Low-power mode summary
Mode name Entry
Sleep
(Sleep now or
WFE
Sleep-on-exit)
PDDS and LPDS
bits +
Stop
SLEEPDEEP bit
+ WFI or WFE
PDDS bit +
Standby SLEEPDEEP bit
+ WFI or WFE
5.3.1

Slowing down system clocks

In Run mode the speed of the system clocks (SYSCLK, HCLK, PCLK1, PCLK2) can be
reduced by programming the prescaler registers. These prescalers can also be used to slow
down peripherals before entering Sleep mode.
For more details refer to
5.3.2

Peripheral clock gating

In Run mode, the HCLKx and PCLKx for individual peripherals and memories can be
stopped at any time to reduce power consumption.
To further reduce power consumption in Sleep mode the peripheral clocks can be disabled
prior to executing the WFI or WFE instructions.
Peripheral clock gating is controlled by the AHB1 peripheral clock enable register
(RCC_AHB1ENR), AHB2 peripheral clock enable register (RCC_AHB2ENR), AHB3
peripheral clock enable register (RCC_AHB3ENR) (see
peripheral clock enable register
clock enable register
enable register
97/1422
Wakeup
WFI Any interrupt
Wakeup event
Any EXTI line (configured
in the EXTI registers,
internal and external lines)
WKUP pin rising edge,
RTC alarm (Alarm A or
Alarm B), RTC Wakeup
event, RTC tamper events,
RTC time stamp event,
external reset in NRST
pin, IWDG reset
Section 6.3.3: RCC clock configuration register
(RCC_AHB2ENR)),
(RCC_AHB3ENR)).
Doc ID 018909 Rev 4
Effect on 1.2 V
domain clocks
CPU CLK OFF
no effect on other
clocks or analog
clock sources
All 1.2 V domain
clocks OFF
All 1.2 V domain
clocks OFF
(RCC_AHB1ENR), Section 6.3.13: RCC AHB2 peripheral
Section 6.3.14: RCC AHB3 peripheral clock
Effect on
V
DD
Voltage regulator
domain
clocks
None
ON or in low- power
mode (depends on
PWR power control
register (PWR_CR)
HSI and
STM32F405xx/07xx
HSE
oscillators
STM32F415xx/17xx
OFF
and
control register
(PWR_CR) for
STM32F42xxx and
STM32F43xxx)
HSI and
HSE
oscillators
OFF
(RCC_CFGR).
Section 6.3.12: RCC AHB1
RM0090
ON
for
and
PWR power
OFF