Tim1&Tim8 Register Map; Table 74. Tim1&Tim8 Register Map And Reset Values - ST STM32F40 Series Reference Manual

RM0090
14.4.21 TIM1&TIM8 register map
TIM1&TIM8 registers are mapped as 16-bit addressable registers as described in the table
below:
Table 74. TIM1&TIM8 register map and reset values
Offset Register
TIMx_CR1
0x00
Reset value
TIMx_CR2
0x04
Reset value
TIMx_SMCR
0x08
Reset value
TIMx_DIER
0x0C
Reset value
TIMx_SR
0x10
Reset value
TIMx_EGR
0x14
Reset value
TIMx_CCMR1
Output Compare
mode
Reset value
0x18
TIMx_CCMR1
Input Capture
mode
Reset value
TIMx_CCMR2
Output Compare
mode
Reset value
0x1C
TIMx_CCMR2
Input Capture
mode
Reset value
TIMx_CCER
0x20
Reset value
TIMx_CNT
0x24
Reset value
TIMx_PSC
0x28
Reset value
TIMx_ARR
0x2C
Reset value
TIMx_RCR
0x30
Reset value
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Doc ID 018909 Rev 4
Advanced-control timers (TIM1&TIM8)
CKD
[1:0]
0 0 0
0 0 0 0 0 0 0 0
ETPS
ETF[3:0]
[1:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0
0
OC2M CC2S
[2:0] [1:0]
0 0 0 0 0 0 0 0 0
IC2
CC2S
IC2F[3:0] PSC
[1:0]
[1:0]
0 0 0 0 0 0 0 0 0
OC4M CC4S
[2:0] [1:0]
0 0 0 0 0 0 0 0 0
IC4
CC4S
IC4F[3:0] PSC
[1:0]
[1:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0
CNT[15:0]
0 0 0 0 0 0 0 0 0
PSC[15:0]
0 0 0 0 0 0 0 0 0
ARR[15:0]
0 0 0 0 0 0 0 0 0
0
CMS
[1:0]
0 0 0 0 0 0 0
MMS[2:0]
0 0 0 0 0 0
TS[2:0] SMS[2:0]
0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
OC1M CC1S
[2:0] [1:0]
0 0 0 0 0 0 0
IC1
CC1S
IC1F[3:0] PSC
[1:0]
[1:0]
0 0 0 0 0 0 0
OC3M CC3S
[2:0] [1:0]
0 0 0 0 0 0 0
IC3
CC3S
IC3F[3:0] PSC
[1:0]
[1:0]
0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0 0
REP[7:0]
0 0 0 0 0 0 0
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