Cryp Functional Description; Figure 201. Block Diagram (Stm32F405Xx/07Xx And Stm32F415Xx/17Xx) - ST STM32F40 Series Reference Manual

RM0090
20.3

CRYP functional description

The cryptographic processor implements a Triple-DES (TDES, that also supports DES) core
and an AES cryptographic core.
cores.
Since the TDES and the AES algorithms use block ciphers, incomplete input data blocks
have to be padded prior to encryption (extra bits should be appended to the trailing end of
the data string). After decryption, the padding has to be discarded. The hardware does not
manage the padding operation, the software has to handle it.
Figure 201

Figure 201. Block diagram (STM32F405xx/07xx and STM32F415xx/17xx)

Section 20.3.1
shows the block diagram of the cryptographic processor.
Status
CRYP_SR
DMA control register
CRYP_DMACR
Interrupt registers
CRYP_IMSCR
CRYP_RIS
CRYP_MISR
Control register
CRYP_CR
Initialization vectors
IV0...IV127
CRYP_IV0...IV1
Key
CRYP_K0. ..K3
Doc ID 018909 Rev 4
and Section 20.3.2
32-bit AHB2 bus
CRYP_DIN
8 × 32-bit
IN FIFO
swappi ng
k255...k0
Cryptographic processor (CRYP)
provide details on these
CRYP_DOUT
8 × 32-bit
OUT FIFO
swappin g
DES/TDES/AES
Processor core
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