Adc Sample Time Register 1 (Adc_Smpr1); Adc Sample Time Register 2 (Adc_Smpr2) - ST STM32F40 Series Reference Manual

Analog-to-digital converter (ADC)
11.13.4

ADC sample time register 1 (ADC_SMPR1)

Address offset: 0x0C
Reset value: 0x0000 0000
31 30 29
Reserved
15 14 13
SMP15_0 SMP14[2:0]
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Bits 31: 27 Reserved, must be kept at reset value.
Bits 26:0 SMPx[2:0]: Channel x sampling time selection
These bits are written by software to select the sampling time individually for each channel.
During sampling cycles, the channel selection bits must remain unchanged.
Note: 000: 3 cycles
11.13.5

ADC sample time register 2 (ADC_SMPR2)

Address offset: 0x10
Reset value: 0x0000 0000
31 30 29 28
SMP9[2:0]
Reserved
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15 14 13 12
SMP
SMP4[2:0]
5_0
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Bits 31:30 Reserved, must be kept at reset value.
Bits 29:0 SMPx[2:0]: Channel x sampling time selection
Note: 000: 3 cycles
297/1422
28 27 26 25
SMP18[2:0]
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12 11 10 9
SMP13[2:0]
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001: 15 cycles
010: 28 cycles
011: 56 cycles
100: 84 cycles
101: 112 cycles
110: 144 cycles
111: 480 cycles
27 26 25
SMP8[2:0]
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11 10 9
SMP3[2:0]
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These bits are written by software to select the sampling time individually for each channel.
During sample cycles, the channel selection bits must remain unchanged.
001: 15 cycles
010: 28 cycles
011: 56 cycles
100: 84 cycles
101: 112 cycles
110: 144 cycles
111: 480 cycles
Doc ID 018909 Rev 4
24 23 22 21
SMP17[2:0]
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8 7 6 5
SMP12[2:0]
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24 23 22 21
SMP7[2:0]
rw rw rw rw
8 7 6 5
SMP2[2:0]
rw rw rw rw
20 19 18
SMP16[2:0]
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4 3 2
SMP11[2:0] SMP10[2:0]
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20 19 18
SMP6[2:0]
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4 3 2
SMP1[2:0] SMP0[2:0]
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RM0090
17 16
SMP15[2:1]
rw rw
1 0
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17 16
SMP5[2:1]
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1 0
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