Ethernet Pins; Table 160. Alternate Function Mapping - ST STM32F40 Series Reference Manual

RM0090
29.3

Ethernet pins

Table 160
signals are mapped onto AF11, some signals are mapped onto different I/O pins, and
should be configured in Alternate function mode (for more details, refer to
pin multiplexer and

Table 160. Alternate function mapping

Port
PA0-WKUP
PA1
PA2
PA3
PA7
PB0
PB1
PB5
PB8
PB10
PB11
PB12
PB13
PC1
PC2
PC3
PC4
PC5
PE2
PG8
PG11
PG13
PG14
PH2
PH3
PH6
PH7
PI10
Ethernet (ETH): media access control (MAC) with DMA controller
shows the MAC signals and the corresponding MII/RMII signal mapping. All MAC
mapping).
Doc ID 018909 Rev 4
AF11
ETH
ETH_MII_CRS
ETH_MII _RX_CLK / ETH_RMII _REF_CLK
ETH _MDIO
ETH _MII_COL
ETH_MII _RX_DV / ETH_RMII _CRS_DV
ETH _MII_RXD2
ETH _MII_RXD3
ETH _PPS_OUT
ETH _MII_TXD3
ETH_ MII_RX_ER
ETH _MII_TX_EN / ETH _RMII_TX_EN
ETH _MII_TXD0 / ETH _RMII_TXD0
ETH _MII_TXD1 / ETH _RMII_TXD1
ETH _MDC
ETH _MII_TXD2
ETH _MII_TX_CLK
ETH_MII_RXD0 / ETH_RMII_RXD0
ETH _MII_RXD1/ ETH _RMII_RXD1
ETH_MII_TXD3
ETH_PPS_OUT
ETH _MII_TX_EN / ETH _RMII_TX_EN
ETH _MII_TXD0 / ETH _RMII_TXD0
ETH _MII_TXD1 / ETH _RMII_TXD1
ETH _MII_CRS
ETH _MII_COL
ETH _MII_RXD2
ETH _MII_RXD3
ETH _MII_RX_ER
Section 7.3.2: I/O
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