Table 56. Adc Register Map And Reset Values (Common Adc Registers) - ST STM32F40 Series Reference Manual

Analog-to-digital converter (ADC)
Table 56. ADC register map and reset values (common ADC registers)
Offset Register
ADC_CSR
0x00
Reset value
ADC_CCR
0x04
Reset value
ADC_CDR
0x08
Reset value 0
Refer to
309/1422
Reserved
Reserved
0
Regular DATA2[15:0]
0 0 0 0 0 0 0 0
Table 2 on page 52 for the register boundary addresses.
Doc ID 018909 Rev 4
Reser
ved
0 0 0 0 0 0
ADC3
Reserved
0 0 0 0 0
0 0 0 0 0 0 0 0 0
Reser
ved
0 0 0 0 0 0 0
ADC2
Re
se
DELAY [3:0]
rv
Reserved
ed
0 0 0 0 0
Regular DATA1[15:0]
0 0 0 0 0 0 0 0 0
RM0090
0 0 0 0 0
ADC1
MULTI [4:0]
0 0 0 0 0
0 0 0 0 0