One-Pulse Mode; Figure 151. Example Of One-Pulse Mode - ST STM32F40 Series Reference Manual

General-purpose timers (TIM2 to TIM5)
15.3.10

One-pulse mode

One-pulse mode (OPM) is a particular case of the previous modes. It allows the counter to
be started in response to a stimulus and to generate a pulse with a programmable length
after a programmable delay.
Starting the counter can be controlled through the slave mode controller. Generating the
waveform can be done in output compare mode or PWM mode. You select One-pulse mode
by setting the OPM bit in the TIMx_CR1 register. This makes the counter stop automatically
at the next update event UEV.
A pulse can be correctly generated only if the compare value is different from the counter
initial value. Before starting (when the timer is waiting for the trigger), the configuration must
be:
●
In upcounting: CNT<CCRx≤ ARR (in particular, 0<CCRx),
● In downcounting: CNT>CCRx.

Figure 151. Example of one-pulse mode.

For example you may want to generate a positive pulse on OC1 with a length of t
after a delay of t
Let's use TI2FP2 as trigger 1:
●
Map TI2FP2 on TI2 by writing IC2S=01 in the TIMx_CCMR1 register.
●
TI2FP2 must detect a rising edge, write CC2P=0 and CC2NP='0' in the TIMx_CCER
register.
●
Configure TI2FP2 as trigger for the slave mode controller (TRGI) by writing TS=110 in
the TIMx_SMCR register.
●
TI2FP2 is used to start the counter by writing SMS to '110 in the TIMx_SMCR register
(trigger mode).
The OPM waveform is defined by writing the compare registers (taking into account the
clock frequency and the counter prescaler).
●
The t
●
The t
value (TIMx_ARR - TIMx_CCR1).
●
Let's say you want to build a waveform with a transition from '0 to '1 when a compare
match occurs and a transition from '1 to '0 when the counter reaches the auto-reload
value. To do this you enable PWM mode 2 by writing OC1M=111 in the TIMx_CCMR1
register. You can optionally enable the preload registers by writing OC1PE=1 in the
TIMx_CCMR1 register and ARPE in the TIMx_CR1 register. In this case you have to
write the compare value in the TIMx_CCR1 register, the auto-reload value in the
TIMx_ARR register, generate an update by setting the UG bit and wait for external
trigger event on TI2. CC1P is written to '0 in this example.
In our example, the DIR and CMS bits in the TIMx_CR1 register should be low.
You only want 1 pulse (Single mode), so you write '1 in the OPM bit in the TIMx_CR1
register to stop the counter at the next update event (when the counter rolls over from the
auto-reload value back to 0). When OPM bit in the TIMx_CR1 register is set to '0', so the
Repetitive Mode is selected.
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as soon as a positive edge is detected on the TI2 input pin.
DELAY
is defined by the value written in the TIMx_CCR1 register.
DELAY
is defined by the difference between the auto-reload value and the compare
PULSE
Doc ID 018909 Rev 4
RM0090
and
PULSE