Figure 144. Capture/Compare Channel (Example: Channel 1 Input Stage); Figure 145. Capture/Compare Channel 1 Main Circuit - ST STM32F40 Series Reference Manual

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General-purpose timers (TIM2 to TIM5)

The input stage samples the corresponding TIx input to generate a filtered signal TIxF.

Then, an edge detector with polarity selection generates a signal (TIxFPx) which can be

used as trigger input by the slave mode controller or as the capture command. It is

prescaled before the capture register (ICxPS).

Figure 144. Capture/compare channel (example: channel 1 input stage)

The output stage generates an intermediate waveform which is then used for reference:

OCxRef (active high). The polarity acts at the end of the chain.

read_in_progress

Capture/Compare Preload Register

capture_transfer

Capture/Compare Shadow Register

Doc ID 018909 Rev 4

TI1F_Falling

(from channel 2)

TI2F_falling

(from channel 2)

MCU-peripheral interface

compare_transfer

to the slave mode controller

/1, /2, /4, /8

(from slave mode

write_in_progress

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