ST STM32F40 Series Reference Manual page 155

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Reset and clock control for (RCC)
Bit 9
Bit 8
Bits 7:6 Reserved, must be kept at reset value.
Bit 5 USART6EN: USART6 clock enable
Bit 4 USART1EN: USART1 clock enable
Bits 3:2 Reserved, must be kept at reset value.
Bit 1 TIM8EN: TIM8 clock enable
Bit 0 TIM1EN: TIM1 clock enable
155/1422
ADC2EN: ADC2 clock enable
Set and cleared by software.
0: ADC2 clock disabled
1: ADC2 clock disabled
ADC1EN: ADC1 clock enable
Set and cleared by software.
0: ADC1 clock disabled
1: ADC1 clock disabled
Set and cleared by software.
0: USART6 clock disabled
1: USART6 clock enabled
Set and cleared by software.
0: USART1 clock disabled
1: USART1 clock enabled
Set and cleared by software.
0: TIM8 clock disabled
1: TIM8 clock enabled
Set and cleared by software.
0: TIM1 clock disabled
1: TIM1 clock enabled
Doc ID 018909 Rev 4
RM0090

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