Table 107. Noise Detection From Sampled Data; Figure 251. Data Sampling When Oversampling By 16; Figure 252. Data Sampling When Oversampling By 8 - ST STM32F40 Series Reference Manual

Universal synchronous asynchronous receiver transmitter (USART)
When noise is detected in a frame:
●
The NF bit is set at the rising edge of the RXNE bit.
●
The invalid data is transferred from the Shift register to the USART_DR register.
●
No interrupt is generated in case of single byte communication. However this bit rises
at the same time as the RXNE bit which itself generates an interrupt. In case of
multibuffer communication an interrupt will be issued if the EIE bit is set in the
USART_CR3 register.
The NF bit is reset by a USART_SR register read operation followed by a USART_DR
register read operation.
Note: Oversampling by 8 is not available in the Smartcard, IrDA and LIN modes. In those modes,
the OVER8 bit is forced to '0 by hardware.

Figure 251. Data sampling when oversampling by 16

RX LINE
Sample
clock

Figure 252. Data sampling when oversampling by 8

RX LINE
Sample
clock(x8)

Table 107. Noise detection from sampled data

753/1422
1 2 3 4
7/16
1 2
Sampled value
000
001
010
011
100
101
Doc ID 018909 Rev 4
sampled values
5 6 7 8 9 10
One bit time
sampled values
3 4 5
3/8
One bit time
NE status
0
1
1
1
1
1
11 12 13 14 15 16
6/16
7/16
6 7 8
2/8
3/8
Received bit value
0
0
0
1
0
1
RM0090