ST STM32F40 Series Reference Manual page 703

Controller area network (bxCAN)
CAN filter FIFO assignment register (CAN_FFA1R)
Address offset: 0x214
Reset value: 0x0000 0000
This register can be written only when the filter initialization mode is set (FINIT=1) in the
CAN_FMR register.
31 30 29
Reserved
15 14 13
FFA15 FFA14 FFA13 FFA12
rw rw rw
Bits 31:28 Reserved, must be kept at reset value.
Bits 27:0 FFAx
CAN filter activation register (CAN_FA1R)
Address offset: 0x21C
Reset value: 0x0000 0000
31 30 29
Reserved
15 14 13
FACT15 FACT14 FACT13 FACT12 FACT11 FACT10 FACT9
rw rw rw
Bits 31:28 Reserved, must be kept at reset value.
Bits 27:0 FACTx
The software sets this bit to activate Filter x. To modify the Filter x registers (CAN_FxR[0:7]),
the FACTx bit must be cleared or the FINIT bit of the CAN_FMR register must be set.
0: Filter x is not active
1: Filter x is active
703/1422
28 27 26 25
FFA27 FFA26 FFA25
rw rw rw
12 11 10 9
FFA11 FFA10 FFA9
rw rw rw rw
:
Filter FIFO assignment for filter x
The message passing through this filter will be stored in the specified FIFO.
0: Filter assigned to FIFO 0
1: Filter assigned to FIFO 1
28 27 26 25
FACT27 FACT26 FACT25 FACT24 FACT23 FACT22 FACT21 FACT20 FACT19 FACT18 FACT17 FACT16
rw rw rw
12 11 10 9
rw rw rw rw
:
Filter active
Doc ID 018909 Rev 4
24 23 22 21
FFA24 FFA23 FFA22 FFA21
rw rw rw rw
8 7 6
FFA8 FFA7 FFA6 FFA5
rw rw rw rw
24 23 22 21
rw rw rw rw
8 7 6
FACT8 FACT7 FACT6 FACT5
rw rw rw rw
20 19 18
FFA20 FFA19 FFA18
rw rw rw
5 4 3 2
FFA4 FFA3 FFA2
rw rw rw
20 19 18
rw rw rw
5 4 3 2
FACT4 FACT3 FACT2
rw rw rw
RM0090
17 16
FFA17 FFA16
rw rw
1 0
FFA1 FFA0
rw rw
17 16
rw rw
1 0
FACT1 FACT0
rw rw