ST STM32F40 Series Reference Manual page 761

Universal synchronous asynchronous receiver transmitter (USART)
1. The lower the CPU clock the lower the accuracy for a particular baud rate. The upper limit of the achievable baud rate can
be fixed with these data.
Table 114. Error calculation for programmed baud rates at f
oversampling by 16
Baud rate
S.No Desired
1. 2.4 KBps 2.400 KBps
2. 9.6 KBps 9.600 KBps
3. 19.2 KBps 19.194 KBps
4. 57.6 KBps 57.582KBps
5. 115.2 KBps 115.385 KBps 16.2500
6. 230.4 KBps 230.769 KBps 8.1250
7. 460.8 KBps 461.538 KBps 4.0625
8. 896 KBps 909.091 KBps 2.0625
9. 921.6 KBps 909.091 KBps 2.0625
10. 1.792 MBps 1.1764 MBps
11. 1.8432 MBps 1.8750 MBps
12. 3.584 MBps NA
13. 3.6864 MBps NA
14. 7.168 MBps NA
15. 7.3728 MBps NA
1. The lower the CPU clock the lower the accuracy for a particular baud rate. The upper limit of the achievable baud rate can
be fixed with these data.
2. Only USART1 and USART6 are clocked with PCLK2. Other USARTs are clocked with PCLK1. Refer to the device
datasheets for the maximum values for PCLK1 and PCLK2.
Table 115. Error calculation for programmed baud rates at f
oversampling by 8
Baud rate
S.No Desired
1. 2.4 KBps
2. 9.6 KBps
761/1422
(1)(2)
Oversampling by 16 (OVER8=0)
f = 30 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
781.2500
195.3125
97.6875
32.5625
1.0625
1.0000
NA
NA
NA
NA
(1) (2)
Oversampling by 8 (OVER8=1)
f = 30 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
2.400 KBps 1562.5000
9.600 KBps 390.6250
Doc ID 018909 Rev 4
= 30 MHz or f
PCLK
% Error =
(Calculated -
Desired)B.Rate
/Desired B.Rate
0.00% 2.400 KBps
0.00% 9.600 KBps
0.03% 19.200 KBps
0.03% 57.582 KBps
0.16% 115.163 KBps 32.5625
0.16% 230.769KBps 16.2500
0.16% 461.538 KBps 8.1250
1.46% 895.522 KBps 4.1875
1.36% 923.077 KBps 4.0625
1.52% 1.8182 MBps
1.73% 1.8182 MBps
NA 3.2594 MBps
NA 3.7500 MBps
NA NA
NA NA
= 30 MHz or f
PCLK
% Error =
(Calculated -
Desired)B.Rate
/Desired B.Rate
0.00% 2.400 KBps
0.00% 9.600 KBps
= 60 MHz,
PCLK
f = 60 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
1562.5000
390.6250
195.3125
65.1250
2.0625
2.0625
1.0625
1.0000
NA
NA
= 60 MHz,
PCLK
f =60 MHz
PCLK
Value
programmed
Actual
in the baud
rate register
3125.0000
781.2500
RM0090
% Error
0.00%
0.00%
0.00%
0.03%
0.03%
0.16%
0.16%
0.05%
0.16%
1.36%
1.52%
1.52%
1.73%
NA
NA
% Error
0.00%
0.00%