Dcmi Embedded Synchronization Unmask Register (Dcmi_Esur) - ST STM32F40 Series Reference Manual

Hide thumbs Also See for STM32F40 Series:
Table of Contents

Advertisement

RM0090
Bit 31:24 FEC: Frame end delimiter code
Bit 23:16 LEC: Line end delimiter code
13.8.8

DCMI embedded synchronization unmask register (DCMI_ESUR)

Address offset: 0x1C
Reset value: 0x0000 0x0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
FEU
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
This byte specifies the code of the frame end delimiter. The code consists of 4
bytes in the form of 0xFF, 0x00, 0x00, FEC.
If FEC is programmed to 0xFF, all the unused codes (0xFF0000XY) are
interpreted as frame end delimiters.
This byte specifies the code of the line end delimiter. The code consists of 4
bytes in the form of 0xFF, 0x00, 0x00, LEC.
Bit 15:8 LSC: Line start delimiter code
This byte specifies the code of the line start delimiter. The code consists of 4
bytes in the form of 0xFF, 0x00, 0x00, LSC.
Bit 7:0 FSC: Frame start delimiter code
This byte specifies the code of the frame start delimiter. The code consists of 4
bytes in the form of 0xFF, 0x00, 0x00, FSC.
If FSC is programmed to 0xFF, no frame start delimiter is detected. But, the 1
occurrence of LSC after an FEC code will be interpreted as a start of frame
delimiter.
LEU
Doc ID 018909 Rev 4
Digital camera interface (DCMI)
9
8
7
6
LSU
st
5
4
3
2
1
0
FSU
348/1422

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32F40 Series and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

This manual is also suitable for:

Stm32f41 seriesStm32f42 seriesStm32f43 seriesRm0090

Table of Contents

Save PDF