RM0090
22.3
HASH functional description
Figure 1
Figure 218. Block diagram for STM32F405xx/07xx and STM32F415xx/17xx
shows the block diagram of the hash processor.
Control and status
registers
Interrupt registers
HASH_IMR
HASH_SR
Control register
HASH_CR
Start register
HASH_ST R
Context swapping
HASH_CSR0..50
Message digest
HASH_H0...H4
Doc ID 018909 Rev 4
32-bit AHB2 bus
IN buffer
Data
register
HASH_DIN
16 × 32-bit
IN FIFO
swa ppin g
context
SHA -1 / MD5
Hash / HMAC
digest
processor core
Hash processor (HASH)
write into HASH_DIN
or write DCAL bit to 1
or 1 complete block
transferred by the DMA
IN FIFO full
or DCAL written to 1
ai16081
600/1422
Need help?
Do you have a question about the STM32F40 Series and is the answer not in the manual?
Questions and answers